Flip Flops : the simplest of Sequential Circuits

Take note that flip-flops can either be simple (termed as ‘latches’) or clocked (synchronous or edge-triggered).

Flip Flops share these properties:

-       has 2 outputs, which are always the complements of each other, generally labeled Q and Q’

-       Bi-stable. It exists in one of two states and, in the absence of input, remains in that state.

-       Can function as a 1-bit memory.

the SR flip-flop

-       this circuit has two input, S(set) and R(reset), and two outputs Q and Q’

-       constructed from a pair of cross-coupled NOR gates(in the diagram red = logical 1;

black = logical 0)

Bi-stability of the SR flip-flop

Let’s assume that S = R = Q = 0. The inputs to the lower NOR gate are Q = 0 and S =0. Therefore the output Q’ = 1 means that the inputs to the upper NOR are Q’ = 1 and R = 0, which gives output Q = 0.

Conclusion : the circuit is internally consistent as long as S = R = 0

To make it simpler to understand, the above statements mean that

Q = 1, Q’ = 0 is also stable for S = R =0

From there, you can see that SR-latches can function as 1-bit memory as Q serves as the ‘value’.

Note that:

-       the SR table can be defined with a table similar to a truth table called a characteristic table

Clocking of the SR flip-flop

The output of the S–R latch changes, after a brief time delay, in response to a change in the input. This is referred to as asynchronous operation.

The JK flip-flop

-       Like the SR flip-flop, it has two inputs (J and K). However, all possible combinations of input values are valid.

When there is no input, the output is stable. 

If only the J input is asserted, the result is a set function, causing the output to be 1

-       if only the K in put is asserted, the result is a reset function, causing the output to be 0

-       if both J and K are 1, function performed is referred as the toggle function (output reversed)

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